Job Description

Digital FPGA Engineer Level 3 (AHT) at Northrop Grumman summary:

The Digital FPGA Engineer Level 3 at Northrop Grumman is responsible for designing, developing, and maintaining high-speed digital FPGA and ASIC solutions within national defense systems. The role involves collaboration with systems engineering, applying model-based engineering, DevSecOps, and Agile practices to deliver cutting-edge products. This position requires expertise in VHDL/Verilog, FPGA tools, digital signal processing, and hands-on experience with AMD/Xilinx or Intel FPGAs, supporting critical defense applications on-site in Northridge, CA.

RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE TYPE: Secret

TRAVEL: No

Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman’s Defense Systems is currently seeking a Digital FPGA Engineer Level 3 with the desire to learn new technologies to join our innovative Digital Technologies Organization to help develop, enhance, and maintain FPGA designs on cutting edge products and systems. As a Digital FPGA Engineer at Northrop Grumman, you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation. Through the use of Model-based Engineering, DevSecOps and Agile practices we continue to evolve how we deliver critical national defense products and capabilities for the warfighter. Our success is grounded in our ability to embrace change, move quickly and continuously drive innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In this capacity, you will utilize your working knowledge of digital signal processing and digital interfaces. This role will support the ARRGM-ER program within the Advanced Weapons Business Unit in Northridge, CA .

This position requires the selected candidate to work on-site in Northridge; CA on a 9/80 schedule . Telework is not available for this position. Relocation assistance, although not guaranteed, may be available.

Roles and Responsibilities:

Responsible for research, design, and development for complex high speed digital designs. 
Support the implementation of digital FPGA hardware architecture and algorithms.
Collaborate with Systems Engineering to ensure firmware design meets system level requirements, review designs and analysis.

Basic Qualifications Digital FPGA Engineer Level 3:

• Bachelor’s degree in electrical engineering or other STEM discipline with 5 years of digital verification engineering experience using industry standard simulation tools; 3 years with an MS degree
• Must have hands on FPGA design experience with VHDL and/or Verilog within the past 3 years.
• Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs
• Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, and QuestaSim
• Must have an active DoD Secret Clearance to start

Preferred Qualifications Digital FPGA Engineer Level 3:

• Experience with DSP, MATLAB, and SimuLink
• Knowledgeable in FPGA physical constraints and achieving timing closure.
• Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
• Generation of Test Benches and support of formal VHDL Verification
• Experience in high-speed FPGA implementation such as AXI, DMA, and Ethernet
• Strong design skills in VHDL and/or Verilog
• Experience in debugging FPGA applications using Altera signal tap or Xilinx ILA
• Experience with PCB schematics 

Primary Level Salary Range: $121,400.00 - $182,000.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Keywords:

FPGA design, VHDL, Verilog, Digital signal processing, ASIC design, Model-based engineering, DevSecOps, Agile practices, Xilinx, Intel FPGAs, Electronic Design Automation, Defense systems

Job Tags

Remote work, Relocation package, Shift work,

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