Design Verification Engineer Job at Sintegra Inc., Sunnyvale, CA

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  • Sintegra Inc.
  • Sunnyvale, CA

Job Description

Position Summary:

We are seeking a highly skilled Design Verification Engineer. The ideal candidate will have a background in working with companies that develop SOC. This position requires working on-site for one of our clients in San Jose, California.

Responsibilities:

  • Develop and execute verification plans for complex digital designs.
  • Create and maintain verification environments using industry-standard tools and methodologies.
  • Implement and debug test-benches and simulation environments.
  • Perform thorough verification of RTL designs, identifying and resolving any discrepancies.
  • Collaborate closely with design engineers to ensure comprehensive coverage and effective debugging.
  • Work with cross-functional teams to integrate verification efforts with overall design and development processes.
  • Participate in code and design reviews to ensure the highest quality standards.
  • Document verification plans, processes, and results, providing clear communication to stakeholders.

Requirements:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • Hands-on experience with verification tools such as UVM, SystemVerilog, and related EDA tools.
  • Background in working with SOC development companies is highly preferred.
  • Strong understanding of digital design principles and verification methodologies.
  • Excellent problem-solving skills and attention to detail.
  • Ability to work effectively in a collaborative team environment.
  • Strong communication skills, both verbal and written.

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